Implementation of the montgomery modular based RSA algorithm on FPGA

Lifting and modulus operations are the main operations on the RSA algorithm which require long computation time. Implementation of the operation of the lift and modulus on hardware devices requiring more resources than other arithmetic operations. Montgomery modular multiplication, the method which can be used to simplify the operation of lift and modulus, is implemented on FPGA, to speed up the computing process. The implementation results in this study, which is done using VHDL on the Xilinx Artix 7 series FPGA, were able to work at a maximum frequency of 133.76 MHz, requiring 17.66 LUT (11, 195 of 63, 400) and 7.14 of IOBs (15 of 210). © 2019 IEEE.